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本帖最后由 zrobinson 于 2013-9-12 22:05 编辑
sean_melb 发表于 2013-9-12 21:13 
我也来说说我这一年的找工经历吧，基本是彻底的失败，希望能给后来者一些警示，也请大家给些意见，指点方向 ...
我觉得你有这么多经验, 完全可以多试试,这几天thomas electronics在招FPGA工程师,而且是用altera芯片的,要用vhdl,你可以上seek搜搜,可惜我没有fpga方面的经验,否则哪怕intern我也要做起来.
不好意思, 我刚才又搜了一下,那个职位没有了,后来在linkedin上看到这个职位已经不再accept applications了, 这是复制过来的内容:
FPGA Engineers
Thomas Electronics of Australia - Sydney Area, Australia
Posted 20 days ago
Job description
First Role:
Key Job description;
FPGA Engineer to implement DDR2/3 Altera IP cores, into an existing and proven video processing VHDL algorithm, for a time critical company display project.
Description;
Development of high speed memory addressing (DDR2/3) for supporting existing (minimally documented) video processing algorithms with extension to refining the video processing algorithms in a short time frame
Second Role:
Key Job description;
FPGA Engineer with DDR experience, VHDL algorithm to support testing and V&V exercises
Description;
Development of high speed memory addressing (DDR2/3) for supporting existing FPGA engineer algorithms with extension to refining the video processing algorithms
Desired Skills and Experience
First Role:
Prerequisites;
Familiarity with Altera Stratix series devices and associated ip-cores OR Familiarity with Xilinx Kintex or Vertex series devices and associated ip-cores. Must be comfortable interpreting and modifying existing VHDL code for use with DDR2/3
Speciality;
Full rate DDR2/3 controller V&V derived by Altera/Xilinx FPGA platform or ASICs
Highly regarded;
Aldec's EDA tool kit (Active-HDL) OR secondly Mentor Graphics (HDL-Designer)
Active HDL Simulation or MODEL sim experience. VHDL preferred
Second Role:
Prerequisites;
Familiarity with Altera Stratix series devices and associated ip-cores OR Familiarity with Xilinx Kintex or Vertex series devices and associated ip-cores.
Speciality;
Experience with DDR2/3 controller V&V derived by Altera/Xilinx FPGA platform or ASICs
Highly regarded;
Aldec's EDA tool kit (Active-HDL) OR secondly Mentor Graphics (HDL-Designer)
Active HDL Simulation or MODEL sim experience. VHDL preferred |
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我以为我会哭，但是我没有 (2015-3-12) lucindaaus 
采访在家上学荣获VCE 满分的 Stephen Zhang 及其父母 (2016-1-4) 冬迹之樱 
楼主:zrobinson
发表于 2013-9-11 17:30
，DBA是数据库分析员吗？你当时在国内就转行了吗，还是过来转的呢？不知道能不能分享一下转行经历？
